1. Feng Chia University Institutional Repository

瀏覽 的方式： 關鍵字 Memory Hierarchy System Design

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題名作者日期
A High Performance Sequential MRU Cache Using Valid-Bit Pre-Decision Search AlgorithmChen, Hsin-Chuan2007-01-26T01:41:42Z
A Linear Time Algorithm for Solving the Incidence Coloring Problem of Chordal GraphsChen, Yen-Ju; Tang, Shyue-Ming; Wan, Yue-Li2007-01-26T01:44:40Z
A Predictive Algorithm for Replication Optimization in Data GridsChang, Ruay-Shiung; Huang, Ning-Yuan; Chang, Jih-Sheng2007-01-26T01:34:20Z
Cache Performance of Data Flow/Control Flow ArchitectureArul, Joseph M.; Lin, NanSheng2007-01-26T01:32:39Z
Improvement on Buffer Management Strategy to Enhance System PerformanceWang, Chen-Ying; Hwang, Shyh-In; Liu, Te-neng2007-01-26T01:38:45Z
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