瀏覽 的方式： 關鍵字 Microarchitecture and Parallelizing Compiler
顯示 1 到 7 筆資料，總共 7 筆
| 題名 | 作者 | 日期 |
| A Method of Improving Translating Performance in the CISC/RISC Hybrids | Jian, Wen-Bin; Chen, Chang-Jiu | 2006-10-30T01:39:54Z |
| Design and Implementation of a Parallelism Detector for CONVEX SPP-1000 System | Hsiao, Yi-Hsin; Yang, Chao-Tung; Tseng, Shian-Shyong | 2006-10-30T01:30:56Z |
| Design and Performance Evaluation of Branch-Skipped Reduced Instruction Set Computers | Wang, Shyh-Jye; Lin, Phen-Lan; Provence, John D. | 2006-10-30T01:29:45Z |
| Non-local Data Reuse in Data Parallel Compiler | Yook, Hyun-Gyoo; Park, Sung-Soon; Koo, Mi-Soon; Park, Myong-Soon | 2006-10-30T01:31:09Z |
| On the Design and Modeling of a Homogeneous VLIW Architecture | Wang, L.; Yang, Ted C. | 2006-10-30T01:40:24Z |
| Optimal Processor Mapping for Linear-Constant Communication on k-ary n-cubes | Wang, Chien-Min; Hou, Yo-Min; Ku, Chiu-Yu | 2006-10-30T01:31:17Z |
| The Analysis and Detection Method for Nondeterminacy in Parallel/Distributed Program | Chu, Li-Wei; Huang, Tsung-Chuan | 2006-10-30T01:40:35Z |
