Hardware Implementation of High-Throughput 3-D Rotation for Graphic Engine Using Double Rotation CORDIC Algorithm

Abstract

High performance architectures can be design for data intensive and latency tolerant applications by maximizing the parallelism and pipelining at the algorithm. The hardware primitives for 3-D rotation for high throughput 3-D graphics and animation are presented in this paper. The primitives are based on the 2-D CORDIC algorithm, in contrast to conventional hardware for graphic engine. The accelerated architecture of the 3-D rotation based on double rotation CORDIC algorithm is also presented in this paper. The throughput is improved by more than 30%, but the additional hardware is required by less than 40%. The 3-D central perspective method for graphic engine is performed by double rotation CORDIC processors. The throughput is also improved by more than 30%.