Reducing the Penalty of False Sharing Patterns and Replacement Operations in F-COMA

Abstract

The F-COMA architecture provides the benefits of data replication and migration. Thus, the requested data block by every processor can be accessed directly in the local node. However, frequently coherence misses will drop down its performance. Because remote accesses caused by these misses induce critical latencies in it. It is important to reduce unnecessary coherence misses especially the false sharing misses in the F-MOCA architecture. On the other hand, because there is only cache system in the F-COMA, we have to reserve the last valid memory block in the cache system while it is replaced. In this paper, we use an effective sub-block mechanism to reduce the impact of false sharing accesses, and three replacement techniques to decrease replacement stall time. According to our evaluation results, these two methods speed up the total system performance about 5% in average under SPLASH benchmarks. The sub-block mechanism could decrease the false sharing miss ratio and miss stall time. The replacement techniques could decrease the replacement stall time.