完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.author | Lin, Rung-Bin | |
| dc.contributor.author | Tsai, Chi-Ming | |
| dc.date.accessioned | 2009-08-23T04:39:20Z | |
| dc.date.accessioned | 2020-05-25T06:25:19Z | - |
| dc.date.available | 2009-08-23T04:39:20Z | |
| dc.date.available | 2020-05-25T06:25:19Z | - |
| dc.date.issued | 2006-10-31T09:07:25Z | |
| dc.date.submitted | 1996-12-19 | |
| dc.identifier.uri | http://dspace.lib.fcu.edu.tw/handle/2377/2932 | - |
| dc.description.abstract | Several of the recent Intel x86/compatible microprocessor designs employ a special decoder which translates the x86 instructions into RISC-like micro-operations. The decoder consists of several translators of different complexity. Each translator can convert the x86 instructions into their corresponding micro-operations. This paper proposes an analytical method that evaluates the performance of a variety of decoder architectures. | |
| dc.description.sponsorship | 中山大學,高雄市 | |
| dc.format.extent | 8p. | |
| dc.format.extent | 995582 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.language.iso | zh_TW | |
| dc.relation.ispartofseries | 1996 ICS會議 | |
| dc.subject.other | Simulation and Performance Evaluation | |
| dc.title | Analytical Study of Performance Evaluation for x86 Instructions to Micro-ops Decoder | |
| 分類: | 1996年 ICS 國際計算機會議 | |
文件中的檔案：
| 檔案 | 描述 | 大小 | 格式 | |
|---|---|---|---|---|
| ce07ics001996000215.pdf | 972.25 kB | Adobe PDF | 檢視/開啟 |
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