Power Reduction by Register Relabeling for Crosstalk-Toggling Free Instruction Bus Coding

Abstract

As process technology moves toward the deep submicron level, crosstalk effects are increasingly important considerations especially when adjacent bus lines switch in opposite directions (so called crosstalk-toggling transitions). Crosstalk-toggling transitions not only increase power consumption but also increase transition delays. While many bus encoding schemes have been proposed to totally avoid crosstalk-toggling transitions thus reducing transition delays in synchronous circuit designs, opportunities exist to additionally reduce power consumption. We propose a register relabeling algorithm to further reduce the instruction bus power consumption based on the existing Selective Shielding method. With no extra hardware requirements and no performance loss, the average energy consumption of our design is 94% compared with an unencoded instruction bus using 90nm technology with a 14mm bus length, and 13% less than that of an instruction bus with Selective Shielding coding. Our scheme makes Selective Shielding method save more energy.