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顯示 1 到 13 筆資料,總共 13 筆
題名作者日期
A New Parallel Reconfigurable Computing Architecture and Hidden Markov Model ApplicationJiang, Yung-Chuan Jr; Paul, Anand Jr; Wang, Jhing-Fa Jr2011-03-31T22:57:22Z
Design and Implementation of Multiprocessor System on a Chip (MPSoC) Based on FPGATseng, Chia-Ying; Chen, Yen-Chih2009-02-12T07:21:48Z
FPGA-Based Reconfigurable Architectures for Neural NetworkGoh, Wee Leng2006-10-25T07:40:14Z
Image Contrast Enhancement Technique For Standard Definition Television何昆展; 陳建志; 王壘2011-03-31T22:56:45Z
Instruction Decoder Implemented with Balsa for an Asynchronous Pipelined 8051 compatible MicrocontrollerChen, Chang-Jiu; Cheng, Wei-Min; Wang, Tuan-Chieh; Chang, Yuan-Teng; Tsai, Hung-Yue2009-02-09T02:41:56Z
More on Unscrambling Address LinesLu, Chang-Chun; Tsai, Shi-Chun2006-10-16T05:37:44Z
Platform For Real Time Image Processing陳冠宇; 黃冠誠; 王壘2011-04-01T00:17:40Z
The Design of Math Core in CPLD for the AES ApplicationJing, M.H.; Chen, Y.H.; Hsu, C. H.2006-10-16T01:44:01Z
Using FPGA to Implement a Partial Reconfigurable Architecture of Embedded SystemDeng, Yan-Xiang; Chang, Yu-Ching; Hwang, Chao-Jang2006-10-16T05:57:19Z
具特殊指令支援的ARM處理器之電路設計范佐毅; 王壘2006-06-15T03:05:29Z
利用決策樹改善以FPGA 為基礎之入侵偵測系統 資源利用魏, 雅笛 Jr; 陳, 奕明 Jr2011-03-25T00:45:18Z
基於Avalon Bus實現8051之同步化多重I/O控制吳, 秋宏 Jr; 李, 世安 Jr; 李, 維聰 Jr2011-03-24T23:38:43Z
實作十六埠樹狀多播封包交換器詹景裕; 羅天一2006-06-13T05:54:51Z