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dc.contributor.authorChen, Chien-Yu
dc.date.accessioned2009-08-23T04:41:28Z
dc.date.accessioned2020-05-25T06:38:52Z-
dc.date.available2009-08-23T04:41:28Z
dc.date.available2020-05-25T06:38:52Z-
dc.date.issued2006-10-16T01:35:13Z
dc.date.submitted2002-12-18
dc.identifier.urihttp://dspace.lib.fcu.edu.tw/handle/2377/1297-
dc.description.abstractThis paper proposes a software architecture of the channel coding and multiplexing processing for 3rd-generation WCDMA mobile system. With the properties of low internal memory usage and fixed task arrangement, this architecture is suitable for DSP implementation. It can also be shown that processing data from multi-user won’t increase the task number and internal memory. Finally, this architecture has been realized in the TI’s TMS320C6201 DSP and the performance simulation and memory estimation of different data rate is given.
dc.description.sponsorship東華大學,花蓮縣
dc.format.extent6p.
dc.format.extent201997 bytes
dc.format.mimetypeapplication/pdf
dc.language.isozh_TW
dc.relation.ispartofseries2002 ICS會議
dc.titleA DSP Software Architecture of Multiplexing and Channel Coding (MCC) Process for WCDMA Mobile System
分類:2002年 ICS 國際計算機會議

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