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dc.contributor.authorHuang, C.-F.
dc.contributor.authorWang, S.-J.
dc.date.accessioned2009-08-23T04:41:24Z
dc.date.accessioned2020-05-25T06:38:31Z-
dc.date.available2009-08-23T04:41:24Z
dc.date.available2020-05-25T06:38:31Z-
dc.date.issued2006-10-16T01:50:15Z
dc.date.submitted2002-12-18
dc.identifier.urihttp://dspace.lib.fcu.edu.tw/handle/2377/1348-
dc.description.abstractSelf-checking circuits can detect the presence of both transient and permanent faults. A self-checking circuit consists of a functional circuit, which produced encoded output vectors, and a checker, which check the output vectors. A self-checking system consists of an interconnection of self-checking circuits. The advantage of such a system is that errors can be caught as soon as they occur; thus, data contamination is prevented. Previous works on self-checking circuit design try to restrict the synthesis procedure such that only restricted errors may appear. However, this approach may not be always feasible, and always requires significant hardware overhead. In this paper, we present a new design methodology, in which functional circuit is not modified. Compared with previous methods, our approach requires less hardware overhead, and experimental results show that the method also achieves good fault coverage.
dc.description.sponsorship東華大學,花蓮縣
dc.format.extent14p.
dc.format.extent254732 bytes
dc.format.extent254732 bytes
dc.format.mimetypeapplication/pdf
dc.format.mimetypeapplication/pdf
dc.language.isozh_TW
dc.relation.ispartofseries2002 ICS會議
dc.titleDesign of Low-Cost Self-Checking Circuits
分類:2002年 ICS 國際計算機會議

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