A VLSI MULTIPROCESSOR SYSTEM FOR CIRCLE DETECTION: HARDWARE DESIGN AND LOAD DISTRIBUTION

Abstract

Circle detection through the use of Hough transform is usually time-consuming. In this paper, we use a VLSI multiprocessor system to generate candidate circle center addresses in parallel, while in each processor only adder operation is needed to determine the accumulator address. To match the updating speed of accumulator memory with the parallel address generation, the accumulator memory is partitioned into modules for parallel access and updating. With the number of memory modules chosen equal to the number of processors, an interleaving scheme for partitioning the circle template table and accumulator memory is proposed. It balances the load of processors and avoids accumulator memory contention. Variations of our scheme are presented and performance is analyzed in this paper as well.