A New Approach to Synthesizing Pipelined Control Paths for Performance Optimization

Abstract

This paper proposes a new and efficient approach to synthesizing the pipelined control paths, by which the performance o control path can be significantly improved at the expense of latency. The proposed approach first transforms the original control specification intro a pipelinable intermediate control specification. And then, traditional control path synthesis is used to synthesize a pipelinable control path. In theory, the shortest clock cycle time of control path achieved by this available hardware resources are unlimited. Experimental results demonstrate that the proposed approach can effectively improve the performance of the control path.