題名: | Generation of Multiple Primary Input Blocking Patterns for Power Minimization during Scan Testing |
作者: | Tseng, Wang-Dauh Lin, Hsu-Yang |
期刊名/會議名稱: | 2006 ICS會議 |
摘要: | In this paper we propose a new approach to generate multiple input control patterns for applying to the primary inputs during shift cycle such that the switching activity occurred in the combinational part of the circuit under test can be suppressed as much as possible. Experiments performed on the ISCAS 89 benchmark circuits show that the proposed approach can always produce better results than the existing approaches. |
日期: | 2007-01-26T02:03:29Z |
分類: | 2006年 ICS 國際計算機會議 |
文件中的檔案:
檔案 | 描述 | 大小 | 格式 | |
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ce07ics002006000045.pdf | 3.75 MB | Adobe PDF | 檢視/開啟 |
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