題名 | 作者 | 日期 |
A New Scheme to Reducing Data Stall with Data Prefectching Table and History Table | Wang, Lung-Hsiung; Wang, Yen-Hsin; Tu, Jih-Fu | 2006-10-18T08:11:42Z |
Improving Branch Target Prediction with Register References | Liu, Yueh-Hung; Chen, Chang-Jiu | 2006-10-18T08:27:15Z |
Boundary Analysis for Buddy Systems | Dan, Chia-Tien; Srisa-an, Witawas; Chang, J.Morris | 2006-10-18T17:14:57Z |
Enhanced RAM-less Modular 2-Dimensional Pipelined FFT | Musleh, Maan; Aboelaze, Mokhtar | 2009-01-19T06:55:42Z |
A 500MHz, 8-Stage Pipeline RISC Microprocessor Design with Sub-Computing | Hu, Ya-Lun; Chang, Ming-Ku; Chen, Tien-Fu; Shiu, Fang-Yu; Cheng, You-Hsiang | 2007-01-25T06:12:32Z |
Instruction Scheduling and Register Relabeling Algorithms for Reducing Switching Activity between Instructions | Wu, Kun-Yi; Kuang, Shiann-Rong | 2009-02-10T02:01:38Z |
Low-Power Sequential MRU Cache Based on Valid-Bit Pre-Decision | Chen, Hsin-Chuan | 2009-02-09T01:58:27Z |
Design of System Resource Manager of Reconfigurable Architecture | Lin, Chih-Tung; Horng, Shi-Jinn; Hwang, Chao-Jang; Hung, Yi-Shu | 2009-02-10T07:21:29Z |
A New Approach for Improving Ported Java JIT Compilers for Embedded Systems | Huang, Shuai-Wei; Chen, Yu-Sheng; Yang, Wuu; Hsu, Wei-Chung; Shann, Jean Jyh-Jiun | 2009-01-19T07:41:20Z |
T-Buffer: A Dense and Fast Storage for Rendering Order-Independent Transparency | Lin, Hui-Chen; Yang, Hui-Chin; Shann, Jyh-Jiun; Chung, Chung-Ping | 2009-02-10T07:21:17Z |